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| DA1016.003 31 October, 2000 MAS1016 AM Receiver IC * Wide Supply Voltage Range * Power Down and Power Up Control * Control for AGC On DESCRIPTION The MAS1016 AM-Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. There are only a few external components needed. The circuit has a preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly with an additional digital circuitry to extract the data from the received signal. FEATURES * * * * * Wide Supply Voltage Range Power Down Control Only a Few External Components Needed Highly Sensitive AM Receiver Control for AGC On APPLICATIONS * Time Signal Receiver designed for MSF (British), WWVB (USA), JG2AS (Japan) and DCF77 (Germany) BLOCK DIAGRAM QO QI AON (=AGC on) RFI AGC Amplifier Demodulator & Comparator OUT Power Supply/Biasing VDD VSS PDN AGC DEC 1 (6) DA1016.003 31 October, 2000 PAD LAYOUT 1788 m VSS RFI PDN AON DEC MAS1016 1786 m VDD QO QI AGC OUT DIE size = 1.79 x 1.79 mm; PAD size = 100 x 100 m Substrate is connected to Vdd. Note: Coordinates are calculated using Vdd as a centre point Pad Identification Power Supply Voltage Quarz Filter Output Quarz Filter Input AGC Capacitor Receiver Output Demodulator Capacitor AGC On Control Power Down Input Receiver Input Power Supply Ground Name VDD QO QI AGC OUT DEC AON PDN RFI VSS X-coordinate 0 m 306 m 587 m 866 m 1143 m 1111 m 868 m 551 m 309 m 16 m Y-coordinate 0 m 19 m 19 m 19 m 19 m 1436 m 1436 m 1436 m 1436 m 1415 m Note 3 2 1 Notes: 1) Level = VSS means receiver on; VDD = receiver off 2) Level = VSS means AGC hold; VDD = AGC on (working) - Internal pull-up with current < 1 A which is switched off in power down - During AGC hold the receiver output OUT is hold down to VSS 3) 100% AM results in Level = VSS; 25% AM results in Level = VDD - the output is a current source/sink with |IOUT| > 5 A - at power down the output is tri-state 2 (6) DA1016.003 31 October, 2000 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VDD-VSS VIN PMAX TOP TST Conditions Min -0.3 VSS-0.3 -20 -40 Max 5.0 VDD+0.3 100 70 120 Unit V V mW o C o C ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 1.4V, Temperature = 25C Parameter Operating Voltage Current Consumption Stand-By Current Input Range Sensitivity Input Levels |lIN|<0.5 A Output Current VOL<0.2 VDD;VOH >0.8 VDD Output Pulse Startup Time Output Delay Time Symbol VDD IDD IDDoff fIN VIN VIL VIH |IOUT| T0 T1 TStart TDelay Conditions Min 1.10 Typ 50 Max 3.60 200 0.1 100 50 0.2 VDD Unit V A A kHz mVrms V A 40 0.001 0.8 VDD 5 65 150 8 50 125 220 100 ms ms s ms 3 (6) DA1016.003 31 October, 2000 TYPICAL APPLICATION Crystal* AON (=AGC on) QO FerriteAntenna RFI AGC Amplifier Demodulator & Comparator OUT QI Receiver output VDD 1.4 V Power Supply/Biasing VSS PDN AGC Note 1 0.47...1 uF 47 nF DEC Crystal frequencies: 77.503 kHz for DCF77 Receiver, 60 kHz for WWVB (USA) and MSF (British) Receiver 40 kHz JG2AS (Japan) Receiver Note 1: AGC Capacitor DCF77 Receiver 0.47 to 1.0 uF WWVB (USA), MSF (British) and JG2AS (Japan) 220 nF (external control of AON (=AGC on)is needed, for more details see also DAEV1016) 4 (6) DA1016.003 31 October, 2000 PACKAGE FOR SAMPLES PDIP 20 NC 1 20 VSS 19 NC 18 RFI 17 PDN 16 AON 15 DEC 14 NC 13 NC 12 NC 11 NC VDD 2 NC QO NC QI 3 4 5 6 AGC 7 OUT 8 NC 9 NC 10 PIN DESCRIPTION Pin Name NC VDD NC QO NC QI AGC OUT NC NC NC NC NC NC DEC AON PDN RFI NC VSS Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Type P AO AI AO DO Function Positive Power Supply Quartz Filter Output Quartz Filter Input AGC Capacitor Receiver Output Note 3 AO DI AI AI G Demodulator Capacitor AGC On Control Power Down Input Receiver Input Power Supply Ground 2 1 Notes: 1) Level = VSS means receiver on; VDD = receiver off 2) Level = VDD means receiver on; VSS = receiver off (PDN = VDD) Internal pull-down resistor > 1MOhm to VSS 3) 100 % AM results in Level = VSS; 25 % AM results in Level = VDD - the output is a current source/sink with [lout] >5 A - at power down the output is tri-state 5 (6) DA1016.003 31 October, 2000 ORDERING INFORMATION Product Code Product Package Comments Thickness 480 m Thickness 400 m MAS1016ATB1 AM-Receiver IC Wafer, EWS-tested MAS1016ATC1 AM-Receiver IC Wafer, EWS-tested Please contact Micro Analog Systems Oy for other wafer thickness options. LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O.Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 6 (6) |
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